GGLABS Memory Test V0.33

GMT welcome screenGMT (GGLABS Memory Test) is a new developed memory test for the Apple IIgs optimized for speed and coverage. The code is based on the test algorithms described in "Testing Semiconductor Memories: Theory and Practice" by A.J. van de Goor. The program is mostly in C plus small sections in assembly. It is free software and released under the GPL v3 license.


The GMT disk images are bootable and will start GMT automatically.
GMT can only test expansion memory on the IIgs, if none is detected it will refuse to start.
The screen is divided in three sections. The System Info window will display information about the system and, while running a test, the currently tested bank and pattern. The Test Config window shows the current selected test and the control keys. T selects the test to perform (see sections below for a description of the tests), enter starts the test and Q reboots the system.
The Log window, as the name states, logs the start/end of a test and eventual errors.

In case of memory errors GMT will output a line for every detected error:

3a 1e52 F0F0 F1F0 F0F0 F1F0 F0F0 10

The numbers are error bank, error address, expected value, original read which triggered the error, 1st re-read, 2nd re-read, 3rd re-read, bad bits. The values are all 16-bits as, for performance reasons, GMT implements only 16-bit reads and writes. The bad bits value is a bitmask showing which bit is bad (a 1 in a specific bit position means at least one read had a miscompare for that specific bit).

There are three different programs in the archive: the generic GMT (gmt140.po for 140K disks, gmt800.2mg for 800K disks) and two versions specifically meant to test RAMGS/4 (ramgs4.2mg) and RAMGS/8 (ramgs8.2mg).
The RAMGS versions have no options. Will start the test immediately and report pass or fail.

Code comments

GMT is a prodos 8 system application. It is built using the open source cc65 C compiler. Small sections of code are written in assembly to access the 65816 16-bit registers and long addressing mode.
The assembly code uses loop unrolling extensively to achieve the best speed without sacrificing test coverage.

MATS Tests

MATS tests are a family of tests designed to find coupling faults within a memory array. It has the same coverage of an exhaustive walking ones/zeros with a much smaller number of write/read passes.
The test also checks for faults sensitive to the previous content of the memory (background pattern) and read induced faults. Three version of the MATS test have been implemented: 4, 8 and 16-bit.

Simultaneous Switching Outputs Test (SSO)

This test stresses back to back read and writes. The basic patter is a walking 1 sequence. For every value in the sequence the true and complement are written back to back. This generates a pattern that flip all data bits every memory transaction.

Address as Data Test (AAD)

This is a simple implementation of the "Address as Data" memory test. For each memory cell it writes a value related to its own address. It is useful to find address related issues.

Binary Data gmt-0.33.tar.gz217.42 KB
Filed under: