GRAM/1D-C00 - 1MB geoRAM clone for Commodore 64/128

Project Status: 
retired

A new version of this project is available here

geoRAMThe geoRAM is a 512KB memory expansion for the Commodore 64 and 128 designed by Berkeley Softworks for use with GEOS. While not as fast as the Commodore REU due to its lack of DMA capabilities, it still provides a significant performance boost. GRAM/1D is a 1MB geoRAM compatible cartridge based on a two 1Mx4 DRAM devices.

The geoRAM is a banked system. The registers at $dfff and $dffe select which 256 bytes page is visible in the $de00-$deff range. The $dfff register selects a 16KB block out of the total memory, the register at $dffe selects the actual 256 bytes page within the selected block. Valid values for a standard geoRAM are 0-31 for the block register and 0-63 for the window register. It is possible to extend the block register to 8-bit to create a 4MB geoRAM.

This version is a simplified reimplementation of the original GRAM/512D with 1MB instead of 512KB of memory. The extra RAM allow to create a RAM 1581 which is especially useful in GEOS.

The design uses two 74LS378 6-bit D-FlipFlop ICs for the block (U4) and window registers (U5). A 16V8 PLD is used to generate the control signals for the two registers and the control signals for the DRAM.
The 74LS157 multiplexers (U6-U8) multiplex the address into rows and columns are required by the DRAM chips.
Two set of DRAMs (DIP and ZIP) are wired in parallel so the user can use either one based on availability.

Issues

The card worked perfectly on the C64C but failed almost immediately on a C128.
After some time scoping out the signals it was obvious there were severe timing violations on the RAS# and CAS# vs the data lines. After reviewing the timing on the GRAM/512D it become obvious that the PLD implementation of the DRAM state machine was significantly faster than the original implemented with a 74LS194.
The original design used this delay to correctly line up CAS# with PHI2.
In our lab we experimented by delaying DOT_CLOCK to the PLD using a simple RC circuit. This fixed the issue proving our theory. However, RC delays are not a robust solution, so we opted to use the inverted DOT_CLOCK to clock the state machine. This has also the added benefit of using the dot clock sharpest edge (the rising edge is very poor as TTL chips have a very weak high side drive).

Testing

Testing has been performed using geo/neo ram memory test and running GEOS. It is important to note that GEOS 2.0r (which was originally shipped with the geoRAM) is required to take advantage of the memory expansion.
Previous versions of GEOS only support the Commodore REU.
We were not able to locate an original GEOS 2.0r image on the internet. Our solution was to download a D81 image of GEOS 2.0 and replace GEOBOOT and CONFIGURE with the correct geoRAM version.
All the required files can be downloaded from http://cbmfiles.com/geos/index.php

geoRAM
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Design Files
Schematics: 
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